1 . Technical Field
The embodiments described herein relate to a semiconductor integrated circuit, and more particularly, to a data center tracking circuit and a semiconductor integrated circuit including the data center tracking circuit.
2 . Related Art
In general, a semiconductor integrated circuit transmits and receives data to and from a chipset by using a data strobe signal. The data, which is transmitted from the semiconductor integrated circuit to the chipset, and the data strobe signal have the same phase. Further, the data, which is transmitted from the chipset to the semiconductor integrated circuit, and the data strobe signal have a phase difference of 90° therebetween.
As described above, when data is sent to a semiconductor memory device, it is preferable that the data strobe signal be toggled at the middle of a range corresponding to one bit of data. For this purpose, the semiconductor memory device generally includes a data center tracking circuit. A clock data recovery (CDR) circuit is typically used as the data center tracking circuit. The clock data recovery circuit includes a delayed locked loop (DLL) or a phase locked loop (PLL), and a clock tree.
Accordingly, a conventional clock data recovery circuit is not very efficient in terms of area and power consumption. Further, a conventional clock data recovery circuit performs a data coding operation to transmit and receive data. This can be problematic because it is difficult to accurately control data timing due to the amount of time required for the coding operation.